Study High-Performance Computing Techniques for Optimizing and Accelerating AI Algorithms Using Quantum Computing and Specialized Hardware
Mohanarajesh Kommineni
Vol. 9, Issue 1, Jan-Dec 2023
Page Number: 48 - 59
Abstract:
High-Performance Computing (HPC) has become a cornerstone for enabling breakthroughs in artificial intelligence (AI) by offering the computational resources necessary to process vast datasets and optimize complex algorithms. As AI models continue to grow in complexity, traditional HPC systems, reliant on central processing units (CPUs), face limitations in scalability, efficiency, and speed. Emerging technologies like quantum computing and specialized hardware such as Graphics Processing Units (GPUs), Tensor Processing Units (TPUs), and Field Programmable Gate Arrays (FPGAs) are poised to address these challenges. This research paper explores various HPC techniques used to optimize and accelerate AI algorithms, focusing on quantum computing’s potential for parallelism and specialized hardware's capabilities in delivering faster computation and energy efficiency. It delves into current advancements, comparative analyses of different HPC methods, and the integration of hybrid quantum-classical approaches to further enhance AI optimization. The study also examines the challenges of implementing these technologies at scale, with an eye toward the future of AI acceleration and the role of HPC in maintaining energy efficiency while meeting computational demands. Through this investigation, we aim to provide a comprehensive overview of how quantum computing and specialized hardware are reshaping the landscape of AI, paving the way for more advanced, efficient, and sustainable AI solutions.
References
- S. Jiang, X. Ren, and Z. Li, 'High-performance GPU-accelerated machine learning,' Journal of Parallel and Distributed Computing, vol. 131, pp. 79-90, 2019. doi: 10.1016/j.jpdc.2018.10.010.
- A. Krizhevsky, I. Sutskever, and G. E. Hinton, 'ImageNet classification with deep convolutional neural networks,' in Proceedings of the 25th International Conference on Neural Information Processing Systems, vol. 1, pp. 1097-1105, 2012.
- S. Woo, G. Lee, J. Kim, and J. Lee, 'An empirical study of deep learning in mobile and embedded systems using specialized hardware,' IEEE Transactions on Parallel and Distributed Systems, vol. 31, no. 9, pp. 2162-2176, Sept. 2020.
- M. Abadi et al., 'TensorFlow: A system for large-scale machine learning,' in Proceedings of the 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI), pp. 265-283, 2016.
- J. Dean and L. A. Barroso, 'The tail at scale,' Communications of the ACM, vol. 56, no. 2, pp. 74-80, 2013.
- D. Patterson et al., 'A domain-specific architecture for deep neural networks,' Communications of the ACM, vol. 61, no. 9, pp. 70-80, 2018. doi:10.1145/3266620.
- N. P. Jouppi et al., 'In-datacenter performance analysis of a tensor processing unit,' in Proceedings of the 44th Annual International Symposium on Computer Architecture (ISCA), pp. 1-12, 2017. doi:10.1145/3079856.3080246.
- A. Shafiee et al., 'ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars,' in Proceedings of the 43rd Annual International Symposium on Computer Architecture, pp. 14-26, 2016. doi:10.1109/ISCA.2016.12.
- D. Silver, A. Huang, C. J. Maddison et al., 'Mastering the game of Go with deep neural networks and tree search,' Nature, vol. 529, pp. 484-489, Jan. 2016. doi:10.1038/nature16961.
- F. Chollet, 'Xception: Deep learning with depthwise separable convolutions,' in Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (CVPR), pp. 1251-1258, 2017.
- J. Cong and B. Xiao, 'Minimizing computation in convolutional neural networks using reconfigurable computing,' in Proceedings of the 22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, pp. 161-170, 2014.
- J. C. Knight and R. N. Horspool, 'The use of reconfigurable hardware in high-performance computing,' IEEE Transactions on Parallel and Distributed Systems, vol. 16, no. 1, pp. 113-120, 2005.
- S. Sahin et al., 'Evaluating the energy efficiency of deep learning algorithms on hardware accelerators,' in Proceedings of the IEEE International Symposium on Workload Characterization (IISWC), pp. 221- 230, 2021. doi:10.1109/IISWC50251.2021.00030.
- M. Mohammadi et al., 'Exploring FPGA acceleration for deep learning,' IEEE Design & Test, vol. 38, no. 1, pp. 37-45, 2021. doi:10.1109/MDAT.2020.3026438.
- S. Furber, 'Large-scale neuromorphic computing systems,' Journal of Neural Engineering, vol. 13, no. 5, pp. 1-15, 2016. doi:10.1088/1741-2560/13/5/051001.
- R. Van Meter and S. J. Devitt, 'The path to scalable quantum computing,' Computer, vol. 49, no. 9, pp. 31-42, 2016. doi:10.1109/MC.2016.300.
- J. M. Arrazola et al., 'Quantum-inspired algorithms for classical AI,' Nature Reviews Physics, vol. 3, pp. 691-705, 2021. doi:10.1038/s42254-021-00339-w.
- Y. Cao et al., 'Quantum chemistry in the age of quantum computing,' Chemical Reviews, vol. 119, no. 19, pp. 10856-10915, 2019. doi:10.1021/acs.chemrev.8b00803.
- A. D. Corcoles et al., 'Challenges and opportunities of near-term quantum computing systems,' Proceedings of the IEEE, vol. 108, no. 8, pp. 1338-1352, 2020. doi:10.1109/JPROC.2020.2996609.
- J. Preskill, 'Quantum computing in the NISQ era and beyond,' Quantum, vol. 2, pp. 79-93, 2018. doi:10.22331/q-2018-08-06-79.
Back Download